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Author	SHA1	Message	Date
Stas Boukarev	f64c78d96e	arm64: simplify decode-logical-immediate	2026-09-09 05:43:40 +03:00
Stas Boukarev	9aadfb046e	sb-pcl::whitespacep don't defeat optimizations	2026-09-09 05:42:59 +03:00
Stas Boukarev	1e992bfe97	riscv: add support for Zba ... Predicated by *backend-subfeatures* Patch by Faried Nawaz.	2026-09-09 04:45:54 +03:00
Stas Boukarev	f47b711b3e	Account for commutativity when finding iteration steps ... (incf x y) actually expands into (setq x (+ y x)), and iteration-step-values only checks the first argument. Using combination-match brings commutative matching automatically. Then the set isn't reoptimized when y changes, again looking for the first argument.	2026-09-09 04:26:39 +03:00
Aaron Estrada	ed317dc00c	fix(sb-simd): define missing-instruction fallbacks for sap-ref on unsupported CPUs ... - In define-vrefs.lisp, emit define-missing-instruction forms for ,sap and (setf ,sap) when the target instruction set is not available. Prevents unattached definition errors during package validation (e.g. F64.8-SAP-REF on hosts without AVX-512 support). - In missing-instruction.lisp, use record-instruction-set and record-name rather than instruction-record-* aliases so that missing-instruction error reporting works for sap-ref and other function records inheriting from base record. - Verified under Intel SDE Haswell (-hsw) and Skylake (-skl) emulation with 0 errors (737 tests, 9,992,078 checks passed). - Verified natively on Zen 4 host with 0 regressions (737 tests, 13,860,908 checks passed).	2026-09-09 02:17:04 +03:00
Aaron Estrada	336b6ae146	feat(sb-simd): guard constant folding and missing instructions on unsupported CPU targets ... - define-instruction-vops.lisp: only declare foldable on defknown when the underlying instruction set is available on the host CPU. - define-scalar-casts.lisp: gate sb-c:foldable on instruction-set-available-p. - define-associatives.lisp, define-reducers.lisp, define-comparisons.lisp, define-unequals.lisp, define-ifs.lisp: fallback to define-missing-instruction when the instruction set is unavailable on the host. This prevents compile-time constant folding from attempting to evaluate vector constructors or instructions on host CPUs lacking the requisite instruction set extensions.	2026-09-09 02:17:04 +03:00
Aaron Estrada	0dc8bb88d2	feat(sb-simd): add modular AVX-512_FP16 vector support (f16.32, f16.16, f16.8) ... - cpu-identification.lisp: add avx512fp16-supported-p detection via CPUID leaf 7 subleaf 0 EDX bit 23. - packages.lisp: export avx512fp16-supported-p and define sb-simd-avx512fp16 package extending sb-simd-avx512dq. - instruction-sets/avx512fp16.lisp: define :avx512fp16 instruction set introducing half-precision float vectors: * f16.32 (512-bit ZMM, 32 lanes) * f16.16 (256-bit YMM, 16 lanes) * f16.8 (128-bit XMM, 8 lanes) * Vector arithmetic (vaddph, vsubph, vmulph, vdivph, vsqrtph, vminph, vmaxph, vrcpph, vrsqrtph, vscalefph) * FMA with :encoding :fma (vfmadd213ph, vfmsub213ph, vfnmadd213ph, vfnmsub213ph) * Conversions (f32.16 <-> f16.16, s32.16 <-> f16.16) * Bitwise logic and casts - define-custom-vops.lisp: add f16.32-not to def-not macrolet. - x86-64-fake-vops.lisp: add f16.8-broadcast, f16.16-broadcast, and f16.32-broadcast fake VOPs. - record.lisp & test-suite/utilities.lisp: replace deprecated :sb-simd-pack-256 and :sb-simd-pack-512 feature guards with :x86-64. - test-packages.lisp: validate sb-simd-avx512fp16 symbol bindings.	2026-09-09 02:17:04 +03:00
Aaron Estrada	16a029c1e0	feat(sb-simd): add modular AVX-512F, AVX-512BW, and AVX-512DQ vector support	2026-09-09 02:17:04 +03:00
Aaron Estrada	9c92f31492	x86-64: fix vbroadcastss and vbroadcastsd EVEX over-promotion ... In avx2-insts.lisp, vbroadcastss and vbroadcastsd mistakenly checked (or (xmm-register-p src) (zmm-register-p dst)) to decide whether to emit EVEX. Because f32.4-broadcast passes src in single-reg (XMM), this caused 128-bit and 256-bit AVX broadcast instructions to be encoded with EVEX prefixes (62 f2 ...), raising SIGILL on hosts lacking AVX-512 support. Fix the condition to check (zmm-register-p dst). Standard emit-avx2-inst already auto-promotes operands using registers 16-31 to EVEX.	2026-09-09 02:17:04 +03:00
Aaron Estrada	2428c1efd0	x86-64: implement AVX-512_FP16 instruction set and CPUID detection ... - avx2-insts.lisp: expand EVEX prefix encoder to support 3-bit mmm opcode map selection, enabling Map 5 (#b101) and Map 6 (#b110). - x86-64-arch.c: add runtime CPUID detection for AVX-512_FP16 (leaf 7, subleaf 0, EDX bit 23) guarded by OS ZMM state enablement. - avx512-insts.lisp: implement complete AVX-512_FP16 instruction suite: * vector and scalar arithmetic (vaddph/sh, vsubph/sh, vmulph/sh, vdivph/sh, vminph/sh, vmaxph/sh, vsqrtph/sh, vrcpph/sh, vrsqrtph/sh, vscalefph/sh) * fused multiply-add (vfmadd*ph/sh, vfmsub*ph/sh, vfnmadd*ph/sh, vfnmsub*ph/sh, vfmaddsub*ph, vfmsubadd*ph, vfcmaddcph, vfmaddcph) * comparisons and classification (vcmpph/sh, vcomish, vucomish, vfpclassph/sh, vrndscaleph/sh) * conversions (vcvtph2psx, vcvtps2phx, vcvtdq2ph, vcvtph2dq, vcvttph2dq, vcvtuw2ph, vcvtw2ph, vcvtph2w, vcvtph2uw, vcvttph2w, vcvttph2uw, vcvtsd2sh, vcvtss2sh, vcvtsi2sh, vcvtsh2si, vcvttsh2si) * scalar and GPR moves (vmovsh, vmovw) * masked instruction variants with {k} and {z} zeroing - tests/assembler.pure.lisp: verify bit-exact binary emission and round-trip disassembly across all FP16 instruction categories.	2026-09-09 02:17:02 +03:00
Aaron Estrada	ce548a2163	x86-64: fix EVEX vmovsd/vmovss emitters, GPR vector move length, and 64-byte inline constant alignment ... - avx512-insts.lisp: pass explicit W=1 for vmovsd (64-bit float) and W=0 for vmovss to prevent #UD on EVEX scalar moves. Fix 3-operand emitter ordering (ModRM r/m in thing, first source in vvvv). - avx2-insts.lisp: force :ll 0 for GPR-to-vector moves (vmovd/vmovq) promoted to EVEX to prevent invalid 512-bit vector length prefixes. - insts.lisp: cap emit-inline-constant alignment to sb-assem::max-alignment so 64-byte :zword constants respect code object alignment bounds.	2026-09-09 02:16:32 +03:00
Aaron Estrada	0546c92588	x86-64: add AVX-512CD, AVX-512VNNI, and AVX-512BF16 instruction definitions	2026-09-09 02:16:32 +03:00
Aaron Estrada	94f65cecd8	x86-64: update avx512-insts.lisp header to reflect implemented instruction subsets	2026-09-09 02:16:32 +03:00
Aaron Estrada	db9c8af135	x86-64: add AVX-512 instruction definitions (vcmpps, vbroadcast, arithmetic) ... - Add EVEX compare-to-mask instructions (vcmpps, vcmppd, vcmpss, vcmpsd) with opmask destination and optional input opmask. - Extend vbroadcastss to accept XMM register sources with auto-promotion. - Extend vpbroadcastd/vpbroadcastq with GPR32/64 sources (opcode #x7C) and XMM vector sources. - Fix kmovd/kmovq GPR transfer prefix and W bits (#xF2 prefix). - Add 14 masked arithmetic and logic instructions with opmask and zero-masking ({z}) support. - Add AVX-512 EVEX test cases to tests/assembler.pure.lisp.	2026-09-09 02:16:32 +03:00
Stas Boukarev	4c24ec8547	case: warn about duplicate keys in the same clause	2026-09-09 02:16:11 +03:00
Stas Boukarev	e019d6a878	arm64: reuse the last comparison in default-unknown-values	2026-09-09 01:47:29 +03:00
Stas Boukarev	2fc0da234d	x86-64: off by one when binding multiple values	2026-09-09 01:47:29 +03:00
Stas Boukarev	a156c041d9	Inline FIXNUMIZE	2026-09-09 01:47:29 +03:00
Stas Boukarev	9bdb6b51ba	arm64: improve load-immediate-word	2026-09-09 01:47:29 +03:00
Stas Boukarev	a95d3f5c50	Fix block-compilation of the build	2026-09-08 20:12:52 +03:00
Charles Zhang	d57ec16e2a	ir1opt: Allow %analyze-set-uses to look through let bindings as well ... Which helps loops where the index wrapped around or transformed by intermediate immutable variable bindings. This particularly helps type inference for SSA form programs where multiple sets correspond to fresh variable bindings that are related through the bindings.	2026-09-08 11:19:28 +02:00
Stas Boukarev	fe75c79a88	Uncommenet accidentally commented out code	2026-09-08 08:57:12 +03:00
Stas Boukarev	6531116f2b	transform-union-typep: don't put double-floats into a member call ... Checking for double-float-p first is better.	2026-09-08 08:19:54 +03:00
Stas Boukarev	8faeac79a9	Better type transform for rational/integer types with different bounds ... Check integers first instead of splitting things into ranges.	2026-09-08 07:40:55 +03:00
Stas Boukarev	4df6bfd828	Fix a typep transform when mixing integers and rationals	2026-09-08 07:10:40 +03:00
Stas Boukarev	a42c09f297	Fix cut-to-width ... The logand mask has to be checked to be unsigned Fixes lp#2166725	2026-09-08 06:07:34 +03:00
Douglas Katzman	d79b179ccb	Clean up fixedobj_points_to_younger	2026-09-07 22:25:59 -04:00
Stas Boukarev	81b27ad777	Remove debugging code ... [skip ci]	2026-09-08 04:33:17 +03:00
Stas Boukarev	b7fb00e028	Disable a flaky test	2026-09-08 04:14:50 +03:00
Stas Boukarev	9c365edb59	x86-64: set the right cost for a VOP	2026-09-08 04:02:15 +03:00
Stas Boukarev	d638084646	Be more diligent about deleted nodes in do-nodes :restart-p t ... Fixes lp#2166714	2026-09-08 03:51:58 +03:00
Stas Boukarev	39aa19ebee	combination-match: transition some logand and logtest transforms	2026-09-08 03:41:33 +03:00
Stas Boukarev	3ce92c6341	Better &rest and cast handling in combination-match	2026-09-07 20:21:36 +03:00
Charles Zhang	731c203ff2	Add a WITH-TEST.	2026-09-07 11:48:56 +02:00
Charles Zhang	bc2c8e1fa9	constraint: Handle equality constraints for local calls generally. ... Which allows us to do bounds elimination for the attached test cases. The constraint propagation code to handle general local calls now resembles something like a cross between the code that handles LET and SET, corresponding to the fact that local call binds variables as LET does but also must clear existing information while propagating some of the old information as SET does.	2026-09-07 11:48:56 +02:00
Charles Zhang	4a1cbf4f1a	constraint: Improve assignment lambda handling. ... Assignment lambdas have first order control flow like let lambdas do. So we can just do global constraint propagation around their blocks like normal instead of having to reason about higher-order control flow through local calls. This speeds things up by not having to do conset bookkeeping in local calls and stopping the leading blocks optimization. Possibly as a consequence, it also seems to derive more constraints this way as shown in the attached test case. In any case, this is clearly how assignment lambdas should be handled (by that I mean the same type propagation logic as with other local call function kinds, but without needing higher order control flow reasoning), so mark the old TODO item around assignment lambdas as finished.	2026-09-07 11:48:56 +02:00
Charles Zhang	1ac5b145ea	constraint: Handle LET and MV-LET in the local call logic. ... It doesn't matter too much, but putting the logic for let and mv-let where the other local call logic is makes it clearer that these propagate constraints from local call arguments to variables. Otherwise we were bending backwards a bit to find the call node just to do that. Whereas the bind node is not something we care about at all, and could not generalize to e.g. ASSIGNMENT or the other functional kinds. It also makes it obvious that we don't handle mv-combinations.	2026-09-07 11:48:56 +02:00
Charles Zhang	9412c7ab71	Remove some unnecessary checks. ... And declare a type.	2026-09-07 11:48:56 +02:00
Stas Boukarev	3e6f374427	More options for combination-match	2026-09-07 10:58:55 +03:00
Stas Boukarev	bb2895f75a	Transfer a couple more uses from combination-match to combination-match2	2026-09-07 10:03:49 +03:00
Stas Boukarev	3ca74b1072	Fix a logcount transform ... Fixes lp#2166634	2026-09-07 08:13:43 +03:00
Stas Boukarev	2880c35e95	Add aliases to combination-match	2026-09-07 05:17:39 +03:00
Douglas Katzman	0d46c3c373	Delete obsolete comment ... Linked lists of objects are not the right way to implement layout remsets	2026-09-06 21:22:09 -04:00
Douglas Katzman	9bc9b7ceaf	Add with-pinned-objects where needed for "documentation" ... This is kind of a no-op for x86-64 and doesn't actually improve the situation for arm64. When fixedobj space was changed to use software card marking instead of mprotect, I wanted to avoid creating more hand-written asm code, and I also thought at the time that the remembered set of modified layouts would be more than just setting a card mark. But it ended up as just that.	2026-09-06 21:21:19 -04:00
Douglas Katzman	c23e7716ae	Fix sb-vm::with-pseudo-atomic-foreign-calls ... The intent is to say that here is logic which it not machine-specific and so we're not going to put it inside of pseudo-atomic inside of a vop, but it needs to act as if it was pseudo-atomic. For sb-safepoint, even though as the comment said it "could" be controlled by an optimize decl, it was not getting done. For nonstop-foreign-call not only should we skip emitting instructions to save the stack pointer and possibly take a stop-for-gc trap, we must insert the pseudo-atomic barrier instructions, otherwise the foreign code would receive a stop-for-gc signal as if in lisp. And the implementation really should get finished for the architecturs other than x86-64, though it does not seem to be as critical and I'm not sure why. The uses guarded by #+immobile-space are clearly unimportant unless immobile space exists, but uses involving dlopen and dladdr seem important.	2026-09-06 20:36:25 -04:00
Stas Boukarev	53d0b3c4ff	Invent a new combination matching macro to do it all	2026-09-07 03:28:02 +03:00
Stas Boukarev	313fd89575	Fix the combination-match macro around :sole-dest ... Fixes lp#2166618 lp#2166617	2026-09-06 21:18:08 +03:00
Stas Boukarev	e8407e53ce	Don't change the number of values types in transforms ... Fixes lp#2166598	2026-09-06 17:11:59 +03:00
Stas Boukarev	935551f30a	Don't ash large integers in an integer-length transform ... Fixes lp#2166599	2026-09-06 17:11:59 +03:00
Stas Boukarev	7ec2408a9d	ltn-analyze-mv-bind: discard more unused variables ... So that default-unknown-values doesn't need to.	2026-09-06 10:01:56 +03:00